Pre-Silicon Software Execution and Performance Validation – A Case Study

In a persistent trend, shrinking IC geometries and higher levels of integration are leading to SoCs packed with increasingly more functionality over time. Much of this functionality is implemented in software running on systems with ever more complex architectures. This creates validation problems that go beyond RTL verification. Software functionality and performance must also be validated, prior to tape-out. Failure to validate the software in the system context can result in costly surprises during post-silicon validation. Unfortunately, traditional RTL simulation tools are not fast enough for any meaningful software validation. But hardware-based emulation and prototyping platforms can fill the void.