RS-232/485 converter has automatic flow control

Description: The circuit in Figure 1 is an RS-232/485 converter that uses the transmitted signal itself to control the flow. The circuit uses MAX232 and MAX483 interface circuits, IC1 and IC2 from Maxim Integrated Products to convert between the ICs' respective signal levels and logic levels. Because both ICs invert the signal, the circuit preserves the original sense of the signal. The MAX483 is normally in the receiving mode. When transmission begins, the signal triggers IC3, the LM555 timer, which in turn toggles IC2's DE and RE lines, putting the chip into the transmitting mode. Q1, the 2N3906, fully discharges C1 each time the trigger line goes low, restarting the timing cycle. The values of R1 and C1 determine how long IC3 maintains the transmitting mode after transmission ends. This interval should be long enough such that the converter doesn’t switch directions while sending characters containing long sequences of zeros. On the other hand, it shouldn’t be so long that the converter misses received characters. The interval T in seconds is T=1/R1C1, where R1 is in ohms, and C1 is in farads. The flow control responds within a few microseconds after transmission commences, so the converter does not miss any bits at low and medium data rates. The application for this circuit operates at 14,400 bps. Figure 2 shows the timing of the serial and flow-control lines. The entire circuit can fit into a DB-25 (or even a DB-9) back shell.

The RS-232/485 converter circuit is designed to facilitate communication between devices using different signaling standards. The MAX232 chip is utilized to convert RS-232 voltage levels to TTL (Transistor-Transistor Logic) levels, while the MAX483 chip performs the opposite function, converting TTL levels back to RS-485. Both chips invert the signal, which is critical for maintaining the integrity of the data being transmitted.

The operation begins with the MAX483 in receive mode, ensuring that it can properly receive incoming data. Once a transmission is initiated, the signal from the transmitting device triggers the LM555 timer (IC3). This timer is configured in a monostable mode, meaning it will output a pulse of a certain duration when triggered. The output from the LM555 controls the DE (Driver Enable) and RE (Receiver Enable) lines of the MAX483, switching it to transmit mode. This action allows the device to send data while ensuring that it does not inadvertently receive during transmission.

Q1, a 2N3906 NPN transistor, plays a pivotal role in resetting the timing cycle of the LM555 timer. When the trigger line goes low, Q1 discharges the timing capacitor C1, allowing the timer to restart its timing cycle. The timing components, R1 and C1, are selected to define the duration of the transmission mode. The relationship T = 1/(R1*C1) dictates the timing, where T is the time in seconds, R1 is the resistance in ohms, and C1 is the capacitance in farads. This timing must be carefully calculated to ensure that the converter does not switch back to receive mode prematurely, particularly during the transmission of long sequences of zeros, which could lead to data loss.

The circuit is optimized for operation at a baud rate of 14,400 bps, which is suitable for many applications requiring moderate-speed data transmission. The flow control mechanism is designed to respond quickly, within microseconds, ensuring that no bits are missed during communication. The design is compact enough to be housed within a DB-25 or DB-9 connector back shell, making it practical for integration into various electronic systems. The timing diagrams, illustrated in Figure 2, provide a clear representation of the relationships between the serial data lines and the flow-control signals, further aiding in the understanding of the circuit's operation.The circuit in Figure 1 is an RS-232/485 converter that uses the transmitted signal itself to control the flow. The circuit uses MAX232 and MAX483 interface circuits, IC1 and IC2 from Maxim Integrated Products (http://www.maxim-ic.com) to convert between the ICs' respective signal levels and logic levels.

Because both ICs invert the signal, the circuit preserves the original sense of the signal. The MAX483 is normally in the receiving mode. When transmission begins, the signal triggers IC3, the LM555 timer, which in turn toggles IC2's DE and RE lines, putting the chip into the transmitting mode.

Q1, the 2N3906, fully discharges C1 each time the trigger line goes low, restarting the timing cycle. The values of R1 and C1 determine how long IC3 maintains the transmitting mode after transmission ends.

This interval should be long enough such that the converter doesn't switch directions while sending characters containing long sequences of zeros. On the other hand, it shouldn't be so long that the converter misses received characters. The interval T in seconds is T=1/R1C1, where R1 is in ohms, and C1 is in farads. The flow control responds within a few microseconds after transmission commences, so the converter does not miss any bits at low and medium data rates.

The application for this circuit operates at 14,400 bps. Figure 2 shows the timing of the serial and flow-control lines. The entire circuit can fit into a DB-25 (or even a DB-9) back shell.