Description: The circuit connects a commercial DCF77 receiver, which is available for approximately $15, to a PC via the RS232 serial port. By modifying the program or the circuit, it is also possible to utilize different systems or I/O ports. Power is supplied through three lines of the RS232 port, which is fully protected against short circuits, eliminating the risk of damage. The DTR and RTS lines are set to high (+12V on the port), while the TXD line is maintained low (-12V) to power the receiver. The RTS line provides positive power to the circuit, and the DTR powers only the monitor LED, which is isolated from the main circuit due to its high current peaks. A BF244 JFET, a 1.5k ohm resistor, and a second LED form a voltage reference of approximately 1.8V required for the commercial receiver. A low current flows through this LED, resulting in minimal brightness. The TL081 operational amplifier transmits the DCF77 signal (RS232 compatible) onto the RXD pin. This pin must consistently be high (+12V, as it is inverted on the RS232) and goes low once per second when a bit is received. According to the DCF77 standard, the pulse duration is 200ms for a high bit and 100ms for a low bit; however, since receivers typically require about 40ms for secure reception, these durations are adjusted to 160ms and 60ms. When these pulses are received by the PC UART 8250 (or a superior model) at a speed of approximately 40 bits per second, a 160ms pulse will generate a $80 or a $C0 byte, while a 60ms pulse will yield a $FE or $FC byte.
The circuit design effectively facilitates the integration of the DCF77 time signal into a PC environment, leveraging the RS232 standard for communication. The use of the DTR and RTS lines ensures that the receiver is adequately powered while maintaining the integrity of the RS232 interface. The isolation of the monitor LED from the main circuit is a critical design consideration, as it prevents potential interference from high current surges that could disrupt the sensitive components of the receiver.
The BF244 JFET serves as a crucial component in establishing the necessary voltage reference for the DCF77 receiver, ensuring stable operation. The choice of a 1.5k ohm resistor in conjunction with the LED allows for controlled current flow, minimizing the brightness of the LED while providing sufficient voltage to the receiver.
The TL081 operational amplifier's role in converting the DCF77 signal to a format compatible with the RS232 standard is vital for reliable data transmission. The operational amplifier's configuration must ensure that the signal levels conform to RS232 voltage standards, facilitating seamless communication with the PC's UART. The timing specifications dictated by the DCF77 standard are essential for accurate data representation, and the adjustments made for safe reception are a testament to the careful design considerations taken to ensure reliable operation.
In summary, this circuit exemplifies a robust solution for interfacing a DCF77 receiver with a PC, showcasing thoughtful design choices that prioritize both functionality and protection against potential circuit issues. The combination of component selection and circuit configuration allows for effective communication and reliable time signal reception.The circuit interfaces a commercial DCF77 receiver (available for about $15) with a PC using the RS232 serial port. By rewriting the program and/or modifying the circuit it`s possible to use also different systems or different I/O ports.
The power is driven from three lines of the RS232 port (that is full protected against short circuits and there fore there is no risk of damaging it). The DTR and RTS lines are set high (+12V on the port) and the TXD is kept low ( 12V) for the power supply of the receiver. The RTS line gives positive power to the circuit and the DTR powers only the monitor LED that is kept separated from the rest of the circuit because of its high current peaks.
When receiving this pulses with the PC UART 8250 (or better) at the speed of about 40 bit per second N81 a 160ms pulse will produce a $80 or a $C0 byte and a 60ms a $FE or $FC.
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