Description: This circuit employs a synchronous demodulator to separate a 1 KHz signal from noise and measures the amplitude of the 1 kHz signals once a second at about 60 microvolts per count then sends the measurements via an RS-232 interface for further processing or display. An LED on the board also lights when the measured signal exceeds a preset threshold. This experiment was started when I took an interest in receiving ELF wireless signals. It also has applications in optics and high frequency RF, or for that matter, any place one needs to measure a tiny signal, of which the frequency and phase are known, in the presence of noise.
With the addition of a preamplifier based on the LM324, the sensitivity of this circuit was easily extended to a sensitivity to 160 nanovolts per count. That an LM324 is used with little in the way of noise on the output testifies to the value of using this kind of detector. There are several sophisticated references on the web that describe how synchronous detectors work, so here I will only give a light overview and go into some specifics of this implementation.
The idea is to multiply the input signal by the output of a local oscillator that is synchronized with the expected signal, and integrate the result. Imagine a square wave being fed into the signal input of the multiplier and a synchronized square wave being fed into the local oscillator input of the multiplier. If the local oscillator is synchronized such that they are perfectly matched in phase, then the output of the multiplier will be positive when the incoming signal and the local oscillator are positive and the output will also be positive when the inputs are negative (negative x negative = positive) this is actually a full wave rectifier when both signals are synchronized and in the proper phase with one another. The signals fed into the integrator charge the .047 uf capacitor in the integrator. After 999 cycles of the 1 kHz sampling signal, U3C is turned on and the capacitor is discharged with a constant current (1.8V/7.5K = 240 microamps), producing a linear positive-going ramp at 5,106 volts/second on the output of U2C. While the output of U2 is ramping up toward the 1.8 volt reference, the AT90S2313 sits in a loop, incrementing a counter every 1.25 microseconds, until the comparator on the AT90S2313 changes state, indicating that the ramp on U2C has reached the 1.8 volt reference voltage. The maximum count for this measurement is 127 to limit the time spent in the measurement to less than the 250 microsecond interrupt interval. Thus, a 7 bit measurement is made in 160 microseconds or less, and is completed within a single 250 microsecond interrupt interval.
The rate of discharge of the integrating capacitor during the measurement phase is set by the current into the node, 1.8 volts/7.5 k = 240 microamps, divided by the .047 uf capacitance, which gives a 5100 volt/second voltage ramp. The A/D conversion sensitivity is therefore 1.25 us/count X 5100 volts/second = 6.375 millivolts per count.
In theory, signals at the proper frequency are presented as DC to the integrator and all other frequencies average out to zero. In practice, this circuit uses square waves to perform the modulation, so it is susceptible to odd harmonics of the sampling frequency, so it is sensitive to 3 kHz, 5 kHz, 7 kHz..., so an analog filter ahead of the detector can be useful if it is important to reject these frequencies.
The circuit can be broken down into several key components. The synchronous demodulator is the heart of the system, utilizing a multiplier IC to perform the signal mixing. A square wave local oscillator, typically generated by a 555 timer or similar device, is synchronized to the 1 kHz signal. The output of the multiplier is then fed into an integrator circuit, which averages the output over time. The LM324 operational amplifier serves as a preamplifier to boost the input signal to a usable level before demodulation.
The output of the integrator is monitored by a microcontroller, such as the AT90S2313, which handles the counting of the ramp voltage and ultimately converts this into a digital format via an ADC. The RS-232 interface facilitates communication with external devices for data logging or display. The LED indicator provides a visual cue for when the signal exceeds the threshold, enhancing user interaction with the system.
For practical implementation, attention should be given to the layout of the PCB to minimize noise pickup and ensure stable operation, especially when dealing with low-level signals. Proper grounding techniques and shielding may also be necessary to maintain the integrity of the measurements in noisy environments.This circuit employs a synchronous demodulator to separate a 1 KHz signal from noise and measures the amplitude of the 1 kHz signals once a second at about 60 microvolts per count then sends the measurements via an RS-232 interface for further processing or display. An LED on the board also lights when the measured signal exceeds a preset threshold. This experiment was started when I took an interest in receiving ELF wireless signals. It also has applictions in optics and high frequency RF, or for that matter, any place one needs to measure a tiny signal, of which the frequency and phase are known, in the presence of noise.
With the addition of a preamplifier based on the LM324, the sensitivity of this circuit was easily extended to a sensitivity to 160 nanovolts per count. That an LM324 is used with little in the way of noise on the output testifies to the value of using this kind of detector.
There are several sophisticated references on the web that describe how synchronous detectors work, so here I will only give a light overview and go into some specifics of this implementation. The idea is to multiply the input signal by the output of a local oscillator that is synchronized with the expected signal, and integrate the result.
Imagine a square wave being fed into the signal input of the multiplier and a synchronized square wave being fed into the local oscillator input of the multiplier. If the local oscillator is synchronized such that they are perfectly matched in phase, then the output of the multiplier will be positive when the incoming signal and the local oscillator are positive and the output will also be positive when the inputs are negative (negative x negative = positive) this is actually a full wave rectifier when both signals are synchronized and in the proper phase with one another.
The signals fed into the integrator charge the .047 uf capacitor in the integrator. After 999 cycles of the 1 kHz sampling signal, U3C is turned on and the capacitor is discharged with a constant current (1.8V/7.5K = 240 microamps), producing a linear positive-going ramp at 5,106 volts/second on the output of U2C. While the output of U2 is ramping up toward the 1.8 volt reference, the AT90S2313 sits in a loop, incrementing a counter every 1.25 microseconds, until the comparitor on the AT90S2313 changes state, indicating that the ramp on U2C has reached the 1.8 volt reference voltage.
The maximum count for this measurement is 127 to limit the time spent in the measurement to less than the 250 microsecond interrupt interval. Thus, a 7 bit measurement is made in 160 microseconds or less, and is completed within a single 250 microsecond interrupt interval.
The rate of discharge of the integrating capacitor during the measurement phase is set by the current into the node, 1.8 volts/7.5 k =240 microamps, divided by the .047 uf capacitance, which gives a 5100 volt/second voltage ramp. The A/D conversion sensitivity is therefore 1.25 us/count X 5100 volts/second = 6.375 millivolts per count.
In theory, signals at the proper frequency are presented as DC to the integrator and all other frequencies average out to zero. In practice, this circuituses square waves to perform the modulation, so it is susceptible to odd harmonics of the sampling frequency, so it is sensitive to 3 kHz, 5 kHz, 7 kHz..., so an analog filter ahead of the detector can be useful if it is important to reject these frequencies.
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