18AC Microcontroller Technical Summary

Overview

The 18AC is a high-performance microcontroller from Scenix Semiconductor, featuring a 50 MIPS execution capability at 50 MHz oscillator frequency. This component combines robust processing power with versatile memory options, including 2KB of EEPROM/Flash program memory and 136 bytes of SRAM. Designed for flexibility, it supports multiple clock modes and offers in-system programming capabilities, making it ideal for a wide range of embedded applications.

Key Features

• High Performance: 50 MIPS at 50 MHz clock speed
• Memory: 2048 x 12-bit EEPROM/Flash (10,000 erase/write cycles) and 136 x 8-bit SRAM
• Clock Options:
  • Internal RC oscillator (31.25 kHz to 4 MHz, ±8% accuracy)
  • External oscillator (XT, LP, HS modes)
  • External RC oscillator
• In-System Programming (ISP): Programmable via OSC pins
• Power Management: Power-down mode with multi-input wakeup (MIWU)
• Peripherals:
  • 8-bit RTCC (Real-Time Clock/Counter)
  • Watchdog Timer (WDT)
  • Analog comparator
  • Brown-out detector
• I/O Ports: Configurable ports with interrupt support

Applications

The 18AC microcontroller is suited for a variety of embedded systems, including:

• Industrial control systems
• Consumer electronics
• Automotive applications
• Sensor interfaces
• Power management systems
• IoT edge devices

Electrical Characteristics

Absolute Maximum Ratings

• Supply Voltage (V_DD): -0.3V to +6.5V
• Input Voltage (V_IN): -0.3V to V_DD + 0.3V
• Operating Temperature: -40°C to +85°C
• Storage Temperature: -65°C to +150°C

DC Characteristics

• Supply Current (Active Mode): 10 mA typical at 5V, 50 MHz
• Supply Current (Power-Down Mode): 1 µA typical
• I/O Pin Leakage: ±1 µA max
• Output Drive Current: 25 mA sink/source per pin

AC Characteristics

• Instruction Cycle Time: 80 ns at 50 MHz
• Reset Pulse Width: 100 ns min
• Oscillator Start-up Time: 10 ms max (crystal mode)

Package Information

The 18AC is available in multiple package options, including:

• 18-pin PDIP: 0.300" wide, plastic dual in-line package
• 18-pin SOIC: 0.209" body width, surface-mount package
• 20-pin SSOP: 0.150" body width, shrink small-outline package

Detailed mechanical drawings and dimensions are provided in the datasheet, with tolerances conforming to JEDEC standards.

Memory Organization

Program Memory

The 2KB program memory space is organized as 2048 x 12-bit words, supporting direct and paged addressing. A 12-bit program counter (PC) and 8-level hardware stack facilitate subroutine calls and interrupts.

Data Memory

The 136-byte SRAM is accessed via a File Select Register (FSR), supporting indirect addressing. Memory banking is controlled through the BANK instruction.

Special Function Registers

Key registers include:

• STATUS (03h): Contains ALU flags and bank select bits
• OPTION: Configures RTCC prescaler, interrupt edges, and WDT settings
• MODE: Controls oscillator selection and power-down behavior

Development Support

The 18AC supports in-system debugging and programming via dedicated pins. A comprehensive instruction set (35 instructions) with byte-oriented, bit manipulation, and control operations enables efficient code development.